Job Description

You will be a part of the Corporate Memory Organization (CMO) Layout Team and will drive layout design development for Memory Compilers. The work is performed with broadly defined parameters, and assignments are often complex and nonstandard in nature. Your responsibilities will include but not be limited to: - Drive physical layout implementation of memory building blocks such as control, sense amplifiers, I/O blocks, bit cell arrays, and decoders within a compiler context, understanding of different memory compiler floorplan and top-level integration. - Bridge the gap between circuit engineering, design automation and mask design. The layout work required encompasses transistor/device cell level planning, layout, assembly and routing. - Productive and proficient in all aspects of layout including Computer-Aided Design (CAD) tool utilization, productivity macro usage, and a solid understanding of all related methodologies and workflow models. - Provide engineering judgment for key decision-making and design trade-offs, including IR drop analysis and resolution, Reliability Verification (RV) analysis, ECO assessment, and schedule analysis. - Drive methodology definition and refinement for memory compilers in collaboration with Design Automation (DA) teams and senior/principal design engineers. - Independently assess and plan complex layout assignments, establish realistic schedules, and ensure timely delivery.

#DesignEnablement

Qualifications

Minimum Qualifications: Bachelor's degree in Electronic/Microelectronic Engineering, Computer Engineering, or a related engineering discipline. Layout design experience. Basic programming skills (UNIX shell script, Tcl, Perl). Preferred Qualifications: Layout design experience including memory compilers. Layout Automation.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.